高性能multi-bit delta-sigma音頻ADC
100分貝的信噪比
-85 dB THD+N
24位,8至200 kHz采樣頻率
I2S/LJ主或從模式數據接口
256/384Fs和其他非標準音頻系統時鐘
低功耗待機模式
Soundbar
音頻接口
數字電視
A/V接收器
DVR
NVR
PIN NAME | PIN NUMBER | I/O | DESCRIPTION |
M0, M1 | 1, 16 | I | Mode selection |
MCLK | 2 | I | Master clock |
SCLK | 7 | I/O | Serial data bit clock |
LRCK | 8 | I/O | Serial data left and right channel frame clock |
SDOUT | 4 | O | Serial data left and right channel frame clock |
RESETb | 9 | I | Active low chip reset (low power) |
AINL, AINR | 10,12 | I | Analog left and right inputs |
VDDP | 3 | I | Power supply for the digital input and output |
VDDD/GNDD | 6, 5 | O | Digital power supply |
VDDA/GNDA | 13, 14 | O | Analog power supply |
REFP | 15 | I | Filtering capacitor connection |
REFQ | 11 | I | Filtering capacitor connection |
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